1. Field of the Invention
The present invention relates to the technology field of non-volatile memory accessing circuits, and more particularly to a write and read circuit for anti-fuse non-volatile memories.
2. Description of the Prior Art
Recently, the role a non-volatile memory plays in semiconductor memory devices has become all the more important. Moreover, with the popularization of portable electronic products such as notebook, digital camera, smart phone, and tablet PC, the non-volatile memories are broadly applied and required to include higher unit-area storage capacity.
NOI (Non-Overlapped Implementation) metal-oxide semiconductor field-effect transistor, including the cross-sectional structure shown by FIG. 1, is a navel non-volatile memory device. As shown in FIG. 1, by using CHEI (Channel Hot Electron Injection) way, the NOI device 1′ can be written with the bits 13′ in two spacers 12′ formed on the two sides of the Gate terminal 11′ thereof. For accomplishing the CHEI, it is able to apply a high voltage on the Gate terminal 11′ and the Drain terminal 14′ (or Source terminal 15′) of the NOI device 1′ for accelerating the speed of the electrons flowing out from the Source terminal 15′ (or Drain terminal 14′) in the channel under the Gate terminal 11′ and two non-overlapped implementation regions under the spacers 12′. On the contrary, the bits 13′ stored in the spacers 12′ can also be erased (eliminated) by using HHI (Hot Hole Injection) way. In order to carry out the HHI, it needs to simultaneously apply a negative voltage and a high positive voltage on the Gate terminal 11′ and the Drain terminal 14′ (or the Source terminal 15′) of the NOI device 1′.
According to researches, the NOI device 1′ can not only be a multi-bits non-volatile device but also an OTP (one-time program) non-volatile device. As the cross-sectional structure of the NOI device 1′ shown by FIG. 2, it can form a LDD (Lightly Doped Drain) region 151′ adjacent to the junction of the Source 15′ of the NOI device 1′. Therefore, a forward read threshold voltage (Vth) and a reverse read threshold voltage can be obtained after treating a forward read and a reverse read to the NOI device 1′, respectively. Moreover, the absolute value of the voltage difference between the forward read threshold voltage and the reverse read threshold voltage may be greater than 0.5V, and such result implies that the NOI device 1′ has been written with one bit after the LDD region 151′ is formed adjacent to the junction of the Source 15′. However, the formed LDD region 151′ cannot be removed from the NOI device 1′ anymore.
Besides aforesaid LDD-forming technique for facilitating the NOI device 1′ be written with one bit, there still has another way for making the NOI device 1′ become an OTP memory device, wherein the another way is called anti-fuse programming. As the cross-sectional structure shown by FIG. 3, a punch through breakdown (PTB) between the Source 15′ and the Drain 14′ is achieved after applying a high voltage of 7.5V˜8.0V to the Drain terminal 14′ of the NOI device 1′ for forming an SDE (Source Drain Extension) region 152′ extended from the Drain 14′ to the Source 15′. Thus, the value of the current read from the NOI device 1′ having the SDE region 152′ may reach 1 mA, and then such NOI device 1′ can be defined to the memory device been programmed (written). On the contrary, if the NOI device 1′ does not be programmed through the PTB way, the current read from the NOI device 1′ can be as low as 1 pA; meanwhile, the NOI device 1′ is defined to the memory device without being programmed (written). Similar to aforesaid LDD formation, the established PTB cannot be eliminated from the NOI device 1′ anymore.
Although researches has been found the NOI device 1′ can be selectively used as a multi-bits memory device or an OTP memory device, a specific bit-writing circuit and/or a specific bit-reading circuit for accessing the NOI devices 1′ does still not be proposed. Accordingly, the inventor of the present application has made great efforts to make inventive research thereon and eventually provided a write and read circuit for anti-fuse non-volatile memory.